URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk/] - Rev 48

Rev	Log message	Author	Age	Path
25	Added timing tests to i2c_model. Updated testbench.	rherveille	7890d 14h	/i2c/trunk
24	Fixed some reported minor start/stop generation timing issuess.	rherveille	7890d 14h	/i2c/trunk
23	* empty log message *	rherveille	8017d 20h	/i2c/trunk
22	Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment.	rherveille	8028d 01h	/i2c/trunk
21	no message	rherveille	8114d 02h	/i2c/trunk
20	Added Appendix A	rherveille	8114d 02h	/i2c/trunk
19	Fixed some race conditions in the i2c-slave model. Added debug information. Added headers.	rherveille	8117d 22h	/i2c/trunk
18	no message	rherveille	8144d 18h	/i2c/trunk
17	C-include file. Initial release	rherveille	8232d 22h	/i2c/trunk
16	Changed PRER reset value from 0x0000 to 0xffff, conform specs.	rherveille	8244d 22h	/i2c/trunk