URL https://opencores.org/ocsvn/i2c/i2c/trunk

Subversion Repositories i2c

[/] [i2c/] [trunk] - Rev 47

Rev	Log message	Author	Age	Path
24	Fixed some reported minor start/stop generation timing issuess.	rherveille	7889d 16h	/i2c/trunk
23	* empty log message *	rherveille	8016d 21h	/i2c/trunk
22	Fixed a small timing bug in the bit controller.\nAdded verilog simulation environment.	rherveille	8027d 02h	/i2c/trunk
21	no message	rherveille	8113d 03h	/i2c/trunk
20	Added Appendix A	rherveille	8113d 03h	/i2c/trunk
19	Fixed some race conditions in the i2c-slave model. Added debug information. Added headers.	rherveille	8116d 23h	/i2c/trunk
18	no message	rherveille	8143d 19h	/i2c/trunk
17	C-include file. Initial release	rherveille	8232d 00h	/i2c/trunk
16	Changed PRER reset value from 0x0000 to 0xffff, conform specs.	rherveille	8243d 23h	/i2c/trunk
15	Split i2c_master_core.vhd into separate files for each entity; same layout as verilog version. Code updated, is now up-to-date to doc. rev.0.4. Added headers.	rherveille	8248d 22h	/i2c/trunk