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[/] [mod_sim_exp/] [tags/] [Release_1.3/] [rtl/] - Rev 103

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Rev Log message Author Age Path
45 chance run_auto port or mod_sim_exp_core to exp_m JonasDC 4218d 18h /mod_sim_exp/tags/Release_1.3/rtl
44 toplevel of the Modular Simultaneous Exponentiation IP core for the PLB interface JonasDC 4222d 11h /mod_sim_exp/tags/Release_1.3/rtl
43 made the core parameters generics JonasDC 4222d 11h /mod_sim_exp/tags/Release_1.3/rtl
42 corrected wrong library name for mod_sim_exp_pkg JonasDC 4228d 19h /mod_sim_exp/tags/Release_1.3/rtl
41 removed deprecated files from version control JonasDC 4228d 19h /mod_sim_exp/tags/Release_1.3/rtl
40 adjusted core instantiation to new core module name JonasDC 4236d 23h /mod_sim_exp/tags/Release_1.3/rtl
39 changed files to remove warnings from synthesis
last cell logic is simplified because of redundant logic
JonasDC 4237d 10h /mod_sim_exp/tags/Release_1.3/rtl
38 deprecated design files because of new pipeline structure, will be removed shortly JonasDC 4237d 16h /mod_sim_exp/tags/Release_1.3/rtl
37 changed names of some generics of the multiplier.
moved the parameters for the core to the package of the core
testbench now uses this parameters to adapt to different bit widths

and new systolic pipeline now supports split or single pipeline
JonasDC 4241d 13h /mod_sim_exp/tags/Release_1.3/rtl
36 found bug in new pipeline structure, now working properly. (tested in sim)
mod_sim_exp_core uses new flexible pipeline as default.
JonasDC 4242d 09h /mod_sim_exp/tags/Release_1.3/rtl

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