URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [rtl/] [core] - Rev 32

Rev	Log message	Author	Age	Path
12	Processor version 1.2.0.5 - see changelog in NEORV32.pdf	zero_gravity	1489d 07h	/neorv32/trunk/rtl/core
11	new hardware version, see changelog in NEORV32.pdf	zero_gravity	1499d 02h	/neorv32/trunk/rtl/core
9	minor edits and updates	zero_gravity	1502d 01h	/neorv32/trunk/rtl/core
8	added missing FENCE instruction; added optional Zifencei CPU extension	zero_gravity	1503d 00h	/neorv32/trunk/rtl/core
7	removed "mtinst" CSR since it is not ratified yet by the RISC-V specs	zero_gravity	1503d 02h	/neorv32/trunk/rtl/core
6	new processor version: 1.0.0.0 -> increased performance; debugged errors; processor now passes risc-v compliance tests; see changelog for more information	zero_gravity	1503d 22h	/neorv32/trunk/rtl/core
5	fixed bootloader bug introduced with last commit	zero_gravity	1512d 08h	/neorv32/trunk/rtl/core
4	see NEORV32.pdf for changelog	zero_gravity	1512d 08h	/neorv32/trunk/rtl/core
3	general updates, see changelog in NEORV32.pdf for more information	zero_gravity	1514d 02h	/neorv32/trunk/rtl/core
2	- initial commit	zero_gravity	1515d 03h	/neorv32/trunk/rtl/core