URL https://opencores.org/ocsvn/neorv32/neorv32/trunk

Subversion Repositories neorv32

[/] [neorv32/] [trunk/] [sw/] [lib/] [include/] [neorv32.h] - Rev 48

Rev	Log message	Author	Age	Path
18	updated to version 1.3.6.0 see NEORV32.pdf for more information	zero_gravity	1407d 17h	/neorv32/trunk/sw/lib/include/neorv32.h
16	minor edits; buck fixes in PMP see changelog in NEORV32.pdf for more information	zero_gravity	1411d 20h	/neorv32/trunk/sw/lib/include/neorv32.h
15	updated to HW version 1.3.5.0 see changelog in NEORV32.pdf for more information	zero_gravity	1412d 19h	/neorv32/trunk/sw/lib/include/neorv32.h
14	update to HW version 1.3.0.0 see changelog in NEORV32.pdf for more information	zero_gravity	1417d 01h	/neorv32/trunk/sw/lib/include/neorv32.h
13	updates, optimizations and bug fixes; see changelog in NEORV32.pdf	zero_gravity	1420d 17h	/neorv32/trunk/sw/lib/include/neorv32.h
12	Processor version 1.2.0.5 - see changelog in NEORV32.pdf	zero_gravity	1422d 00h	/neorv32/trunk/sw/lib/include/neorv32.h
11	new hardware version, see changelog in NEORV32.pdf	zero_gravity	1431d 19h	/neorv32/trunk/sw/lib/include/neorv32.h
10	minor updates and front page modifications	zero_gravity	1434d 17h	/neorv32/trunk/sw/lib/include/neorv32.h
8	added missing FENCE instruction; added optional Zifencei CPU extension	zero_gravity	1435d 17h	/neorv32/trunk/sw/lib/include/neorv32.h
7	removed "mtinst" CSR since it is not ratified yet by the RISC-V specs	zero_gravity	1435d 19h	/neorv32/trunk/sw/lib/include/neorv32.h