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[/] [open8_urisc/] [trunk] - Rev 282

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262 Added comments to LCD controllers - specifically that reading either register 0 or 1 will return the ready status. This code was already present, but not mentioned in the register map. jshamlet 1459d 04h /open8_urisc/trunk
261 Increased delay timer to 7 bits for button press detection. jshamlet 1466d 04h /open8_urisc/trunk
260 Added missing comments for Sequential_Interrupts generic, as well as comments explaining portions of the CPU operations. jshamlet 1479d 03h /open8_urisc/trunk
259 Fixed issue where Write_Fault wasn't defaulting to '0' when Write_Protect was set to FALSE,
Added a pulse interval measurement entity,
Fixed comments.		 jshamlet 1479d 05h /open8_urisc/trunk
258 Fixed write bug in o8_ltc2355_2p.vhd, added a newer Open8_cfg.vhd, and the sys_tick.vhd utility entity. jshamlet 1480d 02h /open8_urisc/trunk
257 Fixed misnamed signal in o8_7seg.vhd and added a replacement switch interface that handles both static and pushbutton switches. jshamlet 1480d 03h /open8_urisc/trunk
256 Removed unused generic from the status_led.vhd and cleaned up comments on the CPU jshamlet 1480d 04h /open8_urisc/trunk
255 Modified code to make ModelSim happy (It didn't like the generate blocks for some reason). Also added a block describing the new generic. jshamlet 1480d 08h /open8_urisc/trunk
254 Simplified the ISR address logic so that the upper 12 bits are constant (set by generic) and only the lower 4 bits are registered/computed. jshamlet 1480d 23h /open8_urisc/trunk
253 Fixed spelling error in comment jshamlet 1480d 23h /open8_urisc/trunk

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