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[/] [open8_urisc/] [trunk] - Rev 287

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Rev Log message Author Age Path
267 Corrected the file description to indicate this is an example package. jshamlet 1347d 18h /open8_urisc/trunk
266 Accidentally uploaded incorrect example file for Open8_cfg.vhd jshamlet 1347d 18h /open8_urisc/trunk
265 Fixed a bug where "reg" wasn't being initialized with Poly_Init at reset. jshamlet 1440d 03h /open8_urisc/trunk
264 Updated comments jshamlet 1450d 00h /open8_urisc/trunk
263 Fixed a very old bug in the CPU core where autoincrements weren't affecting the upper register in the pair, causing it to loop around the lower 256 bytes. This only affected LDX/LDO, as the proper ALU signals were being generated in STO/STX and UPP. Wow, that bug has been in there for AGES.

Also separated the SDLC TX and RX interrupts so that they could be handled separately.		 jshamlet 1450d 00h /open8_urisc/trunk
262 Added comments to LCD controllers - specifically that reading either register 0 or 1 will return the ready status. This code was already present, but not mentioned in the register map. jshamlet 1459d 04h /open8_urisc/trunk
261 Increased delay timer to 7 bits for button press detection. jshamlet 1466d 04h /open8_urisc/trunk
260 Added missing comments for Sequential_Interrupts generic, as well as comments explaining portions of the CPU operations. jshamlet 1479d 03h /open8_urisc/trunk
259 Fixed issue where Write_Fault wasn't defaulting to '0' when Write_Protect was set to FALSE,
Added a pulse interval measurement entity,
Fixed comments.		 jshamlet 1479d 05h /open8_urisc/trunk
258 Fixed write bug in o8_ltc2355_2p.vhd, added a newer Open8_cfg.vhd, and the sys_tick.vhd utility entity. jshamlet 1480d 02h /open8_urisc/trunk

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