OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit] - Rev 190

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.		 olivier.girard 4891d 02h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim		 olivier.girard 4895d 02h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
91 Fixed bug when an IRQ arrives while CPU is halted through the serial debug interface.
This bug is CRITICAL for people using working with interrupts and the Serial Debug Interface.		 olivier.girard 4899d 03h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 4922d 00h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
85 Diverse RTL cosmetic updates. olivier.girard 4922d 02h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
84 Update SRAM model in the core testbench to prevent the IEEE warning when running simulations.
Update watchdog to fix NMI synchronisation problem.
Add synchronizers for the PUC signal in the debug interface.		 olivier.girard 4927d 03h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
83 Add Oscilloscope screenshot + link to the original game. olivier.girard 4973d 03h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
82 Update Actel example project:
- synthesis scripts.
- Spacewar demo program.
- SVN ignore patterns for diverse directories		 olivier.girard 4973d 03h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
81 Initial synthesis, P&R setup for the Actel example project. olivier.girard 4976d 01h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit
80 Create initial version of the Actel FPGA implementation example. olivier.girard 4976d 09h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.