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206 Update ChangeLog olivier.girard 3272d 06h /openmsp430
205 Thanks again to Johan W. good feedback, the following updates are implemented:
- Change code to fix delta cycle issues on some simulators in mixed VHDL/Verilog environment.
- Update oscillators enable generation to relax a critical timing paths in the ASIC version.
- Add option to scan fix inverted clocks in the ASIC version (disabled by default as this is supported by most tools).
olivier.girard 3272d 06h /openmsp430
204 Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that). olivier.girard 3279d 06h /openmsp430
203 Update ChangeLog olivier.girard 3286d 06h /openmsp430
202 Add DMA interface support + LINT cleanup olivier.girard 3286d 06h /openmsp430
201 Update ChangeLog olivier.girard 3447d 05h /openmsp430
200 Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. olivier.girard 3447d 05h /openmsp430
199 Update ChangeLog olivier.girard 3553d 07h /openmsp430
198 Update GDB-Proxy to support new GCC/GDB compiler version from RedHat/TI olivier.girard 3553d 07h /openmsp430
197 Fixed bug on the write strobe of the baudrate hi configuration register. olivier.girard 3804d 06h /openmsp430

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