OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc1/] [cpu] - Rev 239

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5179d 12h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5182d 13h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu
104 Candidate release 0.4.0rc4 jeremybennett 5185d 20h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5194d 14h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu
100 Single precision FPU stuff for or1ksim julius 5194d 16h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5200d 15h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5214d 21h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu
96 Various changes which had not been picked up in earlier commits. jeremybennett 5215d 23h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu
91 Tidy up of some obsolete configuration code. jeremybennett 5228d 12h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5228d 13h /openrisc/tags/or1ksim/or1ksim-0.5.0rc1/cpu

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.