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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc2/] - Rev 235

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Rev	Log message	Author	Age	Path
112	Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register.	jeremybennett	5178d 06h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2
110	or1ksim make check should work without a libc in the or32-elf tools	julius	5179d 07h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2
107	New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug.	jeremybennett	5181d 06h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2
106	Removing old tests, pending addition of new ones.	jeremybennett	5181d 07h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2
104	Candidate release 0.4.0rc4	jeremybennett	5184d 14h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2
101	ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c	jeremybennett	5193d 08h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2
100	Single precision FPU stuff for or1ksim	julius	5193d 10h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2
99	Bug in test evaluation for library fixed.	jeremybennett	5198d 08h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5199d 09h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2
97	Updates to test the new JTAG library interface (not yet complete).	jeremybennett	5213d 15h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc2

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