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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc3] - Rev 433

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Rev	Log message	Author	Age	Path
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5098d 12h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3
220	Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this.	jeremybennett	5105d 04h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3
202	Adding executed log in binary format capability to or1ksim	julius	5111d 08h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3
144	Missing file to fix bug 1797.	jeremybennett	5128d 06h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3
143	Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195).	jeremybennett	5128d 08h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3
134	Updates for stable release 0.4.0	jeremybennett	5136d 12h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3
127	New config option to allow l.xori with unsigned operand.	jeremybennett	5142d 08h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3
124	Overflow handling now in line with architecture manual. Tests added.	jeremybennett	5143d 04h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3
123	Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added.	jeremybennett	5143d 08h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3
122	Added l.ror and l.rori with associated tests.	jeremybennett	5144d 04h	/openrisc/tags/or1ksim/or1ksim-0.5.0rc3

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