URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] - Rev 775

Rev	Log message	Author	Age	Path
450	Simplified (and hopefully more reliable) Ethernet MAC/PHY.	jeremybennett	4936d 20h	/openrisc/trunk/or1ksim
443	Work in progress on more efficient Ethernet.	jeremybennett	4942d 00h	/openrisc/trunk/or1ksim
442	OR1Ksim - adding trace controlability by SIGUSR1 signal.	julius	4942d 15h	/openrisc/trunk/or1ksim
440	Updated documentation to describe new Ethernet usage.	jeremybennett	4943d 16h	/openrisc/trunk/or1ksim
437	Or1ksim - ethernet peripheral update, working much better.	julius	4951d 11h	/openrisc/trunk/or1ksim
436	Or1ksim ethernet TAP updates. Ethernet test still failing.	julius	4952d 11h	/openrisc/trunk/or1ksim
434	Work in progress with new Ethernet TUN/TAP interface.	jeremybennett	4955d 17h	/openrisc/trunk/or1ksim
433	New single program interrupt test programs.	jeremybennett	4956d 19h	/openrisc/trunk/or1ksim
432	Updates to handle interrupts correctly.	jeremybennett	4956d 20h	/openrisc/trunk/or1ksim
430	or1ksim - clarifying interrupt behavior in code and documentation.	julius	4959d 17h	/openrisc/trunk/or1ksim