URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] - Rev 778

Rev	Log message	Author	Age	Path
450	Simplified (and hopefully more reliable) Ethernet MAC/PHY.	jeremybennett	4940d 22h	/openrisc/trunk/or1ksim
443	Work in progress on more efficient Ethernet.	jeremybennett	4946d 03h	/openrisc/trunk/or1ksim
442	OR1Ksim - adding trace controlability by SIGUSR1 signal.	julius	4946d 17h	/openrisc/trunk/or1ksim
440	Updated documentation to describe new Ethernet usage.	jeremybennett	4947d 18h	/openrisc/trunk/or1ksim
437	Or1ksim - ethernet peripheral update, working much better.	julius	4955d 13h	/openrisc/trunk/or1ksim
436	Or1ksim ethernet TAP updates. Ethernet test still failing.	julius	4956d 13h	/openrisc/trunk/or1ksim
434	Work in progress with new Ethernet TUN/TAP interface.	jeremybennett	4959d 19h	/openrisc/trunk/or1ksim
433	New single program interrupt test programs.	jeremybennett	4960d 22h	/openrisc/trunk/or1ksim
432	Updates to handle interrupts correctly.	jeremybennett	4960d 22h	/openrisc/trunk/or1ksim
430	or1ksim - clarifying interrupt behavior in code and documentation.	julius	4963d 19h	/openrisc/trunk/or1ksim