URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [ChangeLog] - Rev 861

Rev	Log message	Author	Age	Path
442	OR1Ksim - adding trace controlability by SIGUSR1 signal.	julius	4929d 02h	/openrisc/trunk/or1ksim/ChangeLog
440	Updated documentation to describe new Ethernet usage.	jeremybennett	4930d 04h	/openrisc/trunk/or1ksim/ChangeLog
437	Or1ksim - ethernet peripheral update, working much better.	julius	4937d 22h	/openrisc/trunk/or1ksim/ChangeLog
436	Or1ksim ethernet TAP updates. Ethernet test still failing.	julius	4938d 22h	/openrisc/trunk/or1ksim/ChangeLog
434	Work in progress with new Ethernet TUN/TAP interface.	jeremybennett	4942d 05h	/openrisc/trunk/or1ksim/ChangeLog
432	Updates to handle interrupts correctly.	jeremybennett	4943d 08h	/openrisc/trunk/or1ksim/ChangeLog
430	or1ksim - clarifying interrupt behavior in code and documentation.	julius	4946d 04h	/openrisc/trunk/or1ksim/ChangeLog
429	or1ksim update - remove debug printfs from eth MDIO emulation function and fix illegal instruction vector jump for invalid instructions.	julius	4946d 08h	/openrisc/trunk/or1ksim/ChangeLog
428	or1ksim - adding preliminary PHY emulation to ethernet peripheral.	julius	4949d 04h	/openrisc/trunk/or1ksim/ChangeLog
420	New feature to trace instructions (option --trace). Manual updated to match.	jeremybennett	4957d 09h	/openrisc/trunk/or1ksim/ChangeLog