URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [configure] - Rev 317

Rev	Log message	Author	Age	Path
104	Candidate release 0.4.0rc4	jeremybennett	5144d 07h	/openrisc/trunk/or1ksim/configure
101	ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c	jeremybennett	5153d 01h	/openrisc/trunk/or1ksim/configure
99	Bug in test evaluation for library fixed.	jeremybennett	5158d 01h	/openrisc/trunk/or1ksim/configure
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5159d 02h	/openrisc/trunk/or1ksim/configure
97	Updates to test the new JTAG library interface (not yet complete).	jeremybennett	5173d 08h	/openrisc/trunk/or1ksim/configure
96	Various changes which had not been picked up in earlier commits.	jeremybennett	5174d 09h	/openrisc/trunk/or1ksim/configure
93	Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0.	jeremybennett	5180d 00h	/openrisc/trunk/or1ksim/configure
91	Tidy up of some obsolete configuration code.	jeremybennett	5186d 22h	/openrisc/trunk/or1ksim/configure
90	Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain).	jeremybennett	5186d 23h	/openrisc/trunk/or1ksim/configure
89	Tidy up for latest bug fixes.	jeremybennett	5187d 06h	/openrisc/trunk/or1ksim/configure