OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [configure.ac] - Rev 434

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5141d 09h /openrisc/trunk/or1ksim/configure.ac
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5144d 10h /openrisc/trunk/or1ksim/configure.ac
104 Candidate release 0.4.0rc4 jeremybennett 5147d 17h /openrisc/trunk/or1ksim/configure.ac
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5156d 11h /openrisc/trunk/or1ksim/configure.ac
99 Bug in test evaluation for library fixed. jeremybennett 5161d 11h /openrisc/trunk/or1ksim/configure.ac
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5162d 12h /openrisc/trunk/or1ksim/configure.ac
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5176d 18h /openrisc/trunk/or1ksim/configure.ac
96 Various changes which had not been picked up in earlier commits. jeremybennett 5177d 20h /openrisc/trunk/or1ksim/configure.ac
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5183d 10h /openrisc/trunk/or1ksim/configure.ac
91 Tidy up of some obsolete configuration code. jeremybennett 5190d 09h /openrisc/trunk/or1ksim/configure.ac

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.