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[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or32/] - Rev 346

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112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5139d 12h /openrisc/trunk/or1ksim/cpu/or32
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5142d 12h /openrisc/trunk/or1ksim/cpu/or32
104 Candidate release 0.4.0rc4 jeremybennett 5145d 20h /openrisc/trunk/or1ksim/cpu/or32
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5154d 13h /openrisc/trunk/or1ksim/cpu/or32
100 Single precision FPU stuff for or1ksim julius 5154d 16h /openrisc/trunk/or1ksim/cpu/or32
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5160d 15h /openrisc/trunk/or1ksim/cpu/or32
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5174d 21h /openrisc/trunk/or1ksim/cpu/or32
96 Various changes which had not been picked up in earlier commits. jeremybennett 5175d 22h /openrisc/trunk/or1ksim/cpu/or32
91 Tidy up of some obsolete configuration code. jeremybennett 5188d 11h /openrisc/trunk/or1ksim/cpu/or32
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5188d 12h /openrisc/trunk/or1ksim/cpu/or32

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