OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [doc/] [or1ksim.info] - Rev 463

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5081d 23h /openrisc/trunk/or1ksim/doc/or1ksim.info
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5082d 06h /openrisc/trunk/or1ksim/doc/or1ksim.info
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5088d 22h /openrisc/trunk/or1ksim/doc/or1ksim.info
202 Adding executed log in binary format capability to or1ksim julius 5095d 02h /openrisc/trunk/or1ksim/doc/or1ksim.info
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5112d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
134 Updates for stable release 0.4.0 jeremybennett 5120d 06h /openrisc/trunk/or1ksim/doc/or1ksim.info
127 New config option to allow l.xori with unsigned operand. jeremybennett 5126d 03h /openrisc/trunk/or1ksim/doc/or1ksim.info
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5126d 22h /openrisc/trunk/or1ksim/doc/or1ksim.info
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5127d 02h /openrisc/trunk/or1ksim/doc/or1ksim.info
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5127d 23h /openrisc/trunk/or1ksim/doc/or1ksim.info

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.