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439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 4965d 18h /openrisc/trunk/orpsocv2/boards
435 ORPSoC updates
OR1200 multiply/MAC/division unit update with serial multiply and
divide options. Full divide not synthesizable yet.
New software tests of multiply and divide functionality.		 julius 4972d 10h /openrisc/trunk/orpsocv2/boards
426 ORPSoC update

Reverted back to previous OR1200 instruction cache.
(...which...)
Fixed or1200-except test failure on generic model.

ML501 build not passing or1200-except test. Tried disabling
burst on the bus (memory server doesn't support it yet) to
no avail. To be continued...		 julius 4985d 09h /openrisc/trunk/orpsocv2/boards
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.		 julius 4985d 10h /openrisc/trunk/orpsocv2/boards
415 ORPSoC - ML501 update, working again.
Documentation update including information on ML501 build
OR1200 updates to do with instruction cache tag signal when
invalidate instruction used.
Added ability to define address to pass to SPI flash when
booting.
Added SPI sw test for board which allows inspection of
data in a flash.		 julius 4993d 19h /openrisc/trunk/orpsocv2/boards
412 ORPSoC update - Rearranged Xilinx ML501, simulations working again. julius 4997d 09h /openrisc/trunk/orpsocv2/boards
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.		 julius 4997d 21h /openrisc/trunk/orpsocv2/boards
409 ORPSoC: Renamed eth core to ethmac (correct name), added drivers for it.
Updated ethernet MAC's instantiation in ORDB1A3PE1500 board build.
Updated documentation.		 julius 4998d 20h /openrisc/trunk/orpsocv2/boards
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4999d 09h /openrisc/trunk/orpsocv2/boards
360 First checkin of new ORPSoC set up - more to come, all but RTL tests temporarily broken julius 5052d 16h /openrisc/trunk/orpsocv2/boards

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