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[/] [openrisc/] [trunk/] [orpsocv2/] [sim/] - Rev 478

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76 Added: +libext+.v
Added: +incdir+.		 rherveille 5209d 22h /openrisc/trunk/orpsocv2/sim
70 ORPSoC cycle accurate trace generation now compatible with latest version of Verilator \(3.800\) - This will break VCD generation on systems which earlier verilator versions\! julius 5256d 12h /openrisc/trunk/orpsocv2/sim
69 ORPSoC xilinx ml501 board update - added ethernet eupport and software test julius 5256d 13h /openrisc/trunk/orpsocv2/sim
68 Fixed up a couple of Makefile things in ORPSoCv2 julius 5259d 05h /openrisc/trunk/orpsocv2/sim
67 New synthesizable builds of ORPSoC - first for the Xilinx ML501 Virtex 5 board, with working Xilinx MIG DDR2 Controller - added new pad option to bin2vmem, moved spi controller from or1k_startup module to its own directory julius 5259d 08h /openrisc/trunk/orpsocv2/sim
66 Fixed the simulator-assisted printf l.nop in cycle accurate, and supporting software. julius 5279d 06h /openrisc/trunk/orpsocv2/sim
64 Trying to fix the system c model jtagsc.h checkout problem, also removed dependency generation in the system c modules makefile. julius 5286d 07h /openrisc/trunk/orpsocv2/sim
63 Finally adding RSP server to cycle accurate model, based on work by Jeremey Bennett but slightly modified for the debug unit we use. Adding binary logging file mode to cycle accurate model which allows smaller and quicker execution logging, along with binary log reader in sw/utils. Adding cycle accurate wishbone bus transaction log generation. still some bugs in CA model for some reason where it skips cycles when logging either execution or bus transactions. Changing or1200 du allowing hardware watchpoints on data load and stores. julius 5296d 04h /openrisc/trunk/orpsocv2/sim
58 ORPSoC2 update - added fpu and implemented in processor, also some sw tests for it, makefile for event sims cleaned up julius 5338d 00h /openrisc/trunk/orpsocv2/sim
57 ORPSoC execution logs created by event sim and cycle accurate should now be equivalent. Changed some of the rule names in orpsoc main makefile to make all rules use hyphens instead of underscores between words julius 5343d 04h /openrisc/trunk/orpsocv2/sim

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