URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2] - Rev 68

Rev	Log message	Author	Age	Path
42	Fixed ORPSoCv2 VCD dumping and UART output in cycleaccurate model	julius	5498d 03h	/openrisc/trunk/orpsocv2
41	Update to or1k top	julius	5501d 04h	/openrisc/trunk/orpsocv2
40	Added GDB server to verilog simulation via VPI and make target to build and run this model	julius	5502d 09h	/openrisc/trunk/orpsocv2
36	Better clean rule in makefile	julius	5516d 10h	/openrisc/trunk/orpsocv2
6	Checking in ORPSoCv2	julius	5520d 21h	/openrisc/trunk/orpsocv2