URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] - Rev 794

Rev	Log message	Author	Age	Path
622	update uart driver for support multiple uart cores from http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2/sw/drivers/uart	filepang	4715d 18h	/openrisc/trunk/rtos
621	update sim.cfg for newer version of Or1ksim. remove unused files. cleanup source code. insert non-local jump(setjmp) in xPortStartScheduler. now xPortStartScheduler() will be returned by xPortEndScheduler().	filepang	4717d 10h	/openrisc/trunk/rtos
620	remove unused file cleanup makefile update uart_init(), disable interrupt before initialize.	jeremybennett	4717d 23h	/openrisc/trunk/rtos
616	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4731d 19h	/openrisc/trunk/rtos
615	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4731d 19h	/openrisc/trunk/rtos
614	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4731d 19h	/openrisc/trunk/rtos
613	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4731d 19h	/openrisc/trunk/rtos
612	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4731d 19h	/openrisc/trunk/rtos
611	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4731d 19h	/openrisc/trunk/rtos
610	Initial port of FreeRTOS by filepang (Kim Sung Su).	jeremybennett	4731d 19h	/openrisc/trunk/rtos