URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc] - Rev 526

Rev	Log message	Author	Age	Path
506	ORPSoC or1200 interrupt and syscall generation test	julius	4876d 18h	/openrisc
505	OR1200 overflow detection fixup SPIflash program update or1200 driver library timer improvement	julius	4876d 18h	/openrisc
504	ORPSoC ALU update with new comparison configuration option, software test for comparisons and register file comment cleanup	julius	4893d 14h	/openrisc
503	ORPSoC's or1200 defines fix to indicate we don't actually have I/DMMU invalidate registers.	julius	4894d 10h	/openrisc
502	ORPSoC update - or1200, ethmac Xilinx fifos or1200 in ORPSoC has carry bit, overflow bit, and range exception added and tested. New software tests in ORPSoC library. Ml501 build had ethmac fifos added, and or1200_defines updated to use these new or1200 features by default	julius	4896d 14h	/openrisc
501	ORPSoC or1200 mult/mac/divide unit serial arith bug fixed. ORPSoC or1200 defines now use serial divide by default	julius	4897d 15h	/openrisc
500	ORPSoC's System C UART model can now accept input from stdin during simulation to drive consoles etc ML501 simulation makefile update to allow custom ELFs to be specified	julius	4897d 18h	/openrisc
499	ORPSoC OR1200 updates - added l.ext instructions with tests, ammended some MAC bugs, decode stage cleanup	julius	4898d 11h	/openrisc
498	or_debug_proxy updates to documentation and Makefile related to latest ftd2xx driver,	julius	4900d 00h	/openrisc
497	or_debug_proxy updates	julius	4900d 20h	/openrisc