OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc] - Rev 568

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
548 New scripts for testing, documentation of testing, fixes to DejaGnu test scripts and updates to scripts. jeremybennett 4813d 18h /openrisc
547 ORPSoC dbg_if fix for slow Wishbone slaves julius 4815d 19h /openrisc
546 ORPSoC update: Fix WB B3 bursting termination on error in WB B3 RAM model julius 4816d 12h /openrisc
545 ORPSoC - revert unecessary i2c fix - driver oneliner was all that was needed. julius 4822d 14h /openrisc
544 ORPSoC ordb1a3pe1500 update - adding SD card controller. julius 4822d 21h /openrisc
543 i2c_master_slave bug fix for slave, potentially holding SDA low when master wants to send stop. julius 4822d 21h /openrisc
542 ORPSoC scripts cleanup. Now centralised.

Documentation updated for ml501's SPI programming, noting issues with ISE12.
julius 4828d 11h /openrisc
541 uC/OS-II port update - maintain cache settings in SR for new tasks. Thanks to contributor Stefan Kristiansson julius 4830d 16h /openrisc
540 Ensure the re-entrancy structure is re-initialized on restart. jeremybennett 4831d 13h /openrisc
539 newlib update - sync exception stack size define between crt0 and or1k-support library julius 4831d 19h /openrisc

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.