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Subversion Repositories openrisc_2011-10-31

[/] [openrisc] - Rev 138

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118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5146d 22h /openrisc
117 Updates on l.ff1, l.fl1 and l.maci. jeremybennett 5149d 01h /openrisc
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5149d 01h /openrisc
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5150d 01h /openrisc
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5150d 02h /openrisc
113 Updates to exception handling for l.add and l.div jeremybennett 5151d 01h /openrisc
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5151d 01h /openrisc
111 Changed conditionals for Verilator to "verilator" instead of "VERILATOR". jeremybennett 5151d 05h /openrisc
110 or1ksim make check should work without a libc in the or32-elf tools julius 5152d 02h /openrisc
109 or_debug_proxy does signals with signals, just ignores signals julius 5152d 10h /openrisc

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