OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_42/] [or1ksim/] [cpu/] [or32] - Rev 482

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
293 added draft VAPI files; added verbose option to sim section markom 8286d 09h /or1k/tags/nog_patch_42/or1ksim/cpu/or32
269 added labels; corrected false if clause, preventing to fill iqueue markom 8288d 08h /or1k/tags/nog_patch_42/or1ksim/cpu/or32
264 updated cpu config section; added sim config section markom 8291d 02h /or1k/tags/nog_patch_42/or1ksim/cpu/or32
263 configure for cpu; modified command line options markom 8291d 03h /or1k/tags/nog_patch_42/or1ksim/cpu/or32
262 small bug in build_automata fixed; configure for memory markom 8291d 03h /or1k/tags/nog_patch_42/or1ksim/cpu/or32
261 modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc markom 8291d 06h /or1k/tags/nog_patch_42/or1ksim/cpu/or32
242 removed GlobalMode markom 8298d 07h /or1k/tags/nog_patch_42/or1ksim/cpu/or32
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8300d 05h /or1k/tags/nog_patch_42/or1ksim/cpu/or32
206 Several modifications to support gdb in a new exception style mode.
This new version works with gdb, and does not require the simulator
to implement a writeable PC.
chris 8327d 08h /or1k/tags/nog_patch_42/or1ksim/cpu/or32
184 modified decode for trace debugging chris 8348d 09h /or1k/tags/nog_patch_42/or1ksim/cpu/or32

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.