OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_50] - Rev 642

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
621 Cache test works on hardware. simons 8204d 16h /or1k/tags/nog_patch_50
620 use ARITH_SET_FLAG to turn off set flag by arith. instructions markom 8204d 16h /or1k/tags/nog_patch_50
619 all test pass, after newest changes markom 8204d 16h /or1k/tags/nog_patch_50
618 Fixed display of new 'void' nop insns. lampret 8205d 01h /or1k/tags/nog_patch_50
617 Changed 'void' nop-ops instead of insn[0] to use insn[16]. Debug unit stalls the tick timer. Prepared new flag generation for add and and insns. Blocked DC/IC while they are turned off. Fixed I/D MMU SPRs layout except WAYs. TODO: smart IC invalidate, l.j 2 and TLB ways. lampret 8205d 01h /or1k/tags/nog_patch_50
616 flags test added markom 8207d 11h /or1k/tags/nog_patch_50
615 cmov and extxx instructions; add, addi, and, andi now set flag markom 8207d 11h /or1k/tags/nog_patch_50
614 Changed to support new debug if. simons 8207d 18h /or1k/tags/nog_patch_50
613 init: trap exception occurs always; initialization of sr not needed anymore markom 8208d 15h /or1k/tags/nog_patch_50
612 Tick timer period extended to meet real timing. simons 8208d 17h /or1k/tags/nog_patch_50

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.