OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_52/] - Rev 371

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
351 Fixed some l.trap typos. lampret 8276d 18h /or1k/tags/nog_patch_52
350 For GDB changed single stepping and disabled trap exception. lampret 8276d 20h /or1k/tags/nog_patch_52
349 Some bugs regarding cache simulation fixed. simons 8278d 08h /or1k/tags/nog_patch_52
348 Added instructions on how to build configure. ivang 8279d 16h /or1k/tags/nog_patch_52
347 Added CRC32 calculation to Ethernet erez 8280d 13h /or1k/tags/nog_patch_52
346 Improved Ethernet simulation erez 8280d 15h /or1k/tags/nog_patch_52
345 Added check for net/ethernet.h (needed by ethernet simulator) erez 8280d 15h /or1k/tags/nog_patch_52
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8280d 17h /or1k/tags/nog_patch_52
343 Small touches to test programs erez 8280d 19h /or1k/tags/nog_patch_52
342 added exception vectors to support and modified section names markom 8281d 16h /or1k/tags/nog_patch_52

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.