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[/] [or1k/] [tags/] [nog_patch_61] - Rev 1170

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Rev Log message Author Age Path
1147 remove unneeded include phoenix 7795d 10h /or1k/tags/nog_patch_61
1146 cygwin fix phoenix 7795d 10h /or1k/tags/nog_patch_61
1145 1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine.		 sfurman 7795d 11h /or1k/tags/nog_patch_61
1144 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.		 sfurman 7797d 17h /or1k/tags/nog_patch_61
1143 Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. sfurman 7798d 07h /or1k/tags/nog_patch_61
1142 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.		 sfurman 7798d 07h /or1k/tags/nog_patch_61
1141 WB = 1/2 RISC clock test code enabled. lampret 7799d 16h /or1k/tags/nog_patch_61
1140 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. lampret 7799d 16h /or1k/tags/nog_patch_61
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7799d 17h /or1k/tags/nog_patch_61
1138 Added some information how to run simulations. lampret 7800d 12h /or1k/tags/nog_patch_61

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