URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_63/] [or1ksim/] [testbench] - Rev 532

Rev	Log message	Author	Age	Path
480	RTL_SIM define added for shorter simulation runtime.	simons	8301d 11h	/or1k/tags/nog_patch_63/or1ksim/testbench
479	connection with gdb repaired; temp_except_delay removed; lot of except and debug code cleaned; sys 203 causes stall under gdb; non-sim memory area log bug fixed	markom	8301d 11h	/or1k/tags/nog_patch_63/or1ksim/testbench
478	Started adding acv_gpio testbench	erez	8301d 12h	/or1k/tags/nog_patch_63/or1ksim/testbench
476	Fixed warnings.	ivang	8301d 12h	/or1k/tags/nog_patch_63/or1ksim/testbench
475	l.jalr r9 is not used any more.	simons	8301d 13h	/or1k/tags/nog_patch_63/or1ksim/testbench
473	Added test flag templates.	ivang	8301d 17h	/or1k/tags/nog_patch_63/or1ksim/testbench
472	Removed MC initialization. Must be done in except_mc.S	ivang	8301d 17h	/or1k/tags/nog_patch_63/or1ksim/testbench
471	Removed MC initialization. Must be done in except_mc.S	ivang	8301d 17h	/or1k/tags/nog_patch_63/or1ksim/testbench
470	Added test flag templates.	ivang	8301d 17h	/or1k/tags/nog_patch_63/or1ksim/testbench
469	Added test flag templates	ivang	8301d 17h	/or1k/tags/nog_patch_63/or1ksim/testbench