URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_68/] [or1ksim/] [cpu/] [or1k/] [except.c] - Rev 1780

Rev	Log message	Author	Age	Path
450	Exceptions are allways enabled.	simons	8345d 00h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c
437	When lsu instruction produce exception registers are preserved.	simons	8346d 20h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8374d 23h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c
261	modified memory accesses; added cfg script; added pic test basic entry of vga; some extensions to mc	markom	8387d 00h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c
254	Made error report more verbose	erez	8388d 20h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c
221	major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup	markom	8396d 00h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c
182	updated exception handling procedures	chris	8444d 04h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c
167	- SPR values corrected - testbenches now work - lot of optimizations, use --disable-debugmod for optimal performance - some tick timer bugs fixed	markom	8472d 20h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c
152	Breakpoint exceptions from single step are not printed now.	chris	8515d 03h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c
139	Modifications for functional gdb	chris	8516d 22h	/or1k/tags/nog_patch_68/or1ksim/cpu/or1k/except.c