URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_68] - Rev 824

Rev	Log message	Author	Age	Path
802	Cache and tick timer tests fixed.	simons	8137d 07h	/or1k/tags/nog_patch_68
801	l.muli instruction added	markom	8139d 03h	/or1k/tags/nog_patch_68
800	Bug fixed.	simons	8140d 01h	/or1k/tags/nog_patch_68
799	Wrapping around 512k boundary to simulate real hw.	simons	8143d 18h	/or1k/tags/nog_patch_68
798	Hardware scroll added. This possible due to the fact that crt is wrapping around 512k boundary.	simons	8143d 18h	/or1k/tags/nog_patch_68
797	Changed hardcoded address for fake MC to use a define.	lampret	8143d 19h	/or1k/tags/nog_patch_68
796	Removed unused ports wb_clki and wb_rst_i	lampret	8143d 19h	/or1k/tags/nog_patch_68
795	Added a directive to ignore signed division variables that are only used in simulation.	lampret	8144d 00h	/or1k/tags/nog_patch_68
794	Added again just recently removed full_case directive	lampret	8144d 00h	/or1k/tags/nog_patch_68
793	Added synthesis off/on for timescale.v included file.	lampret	8144d 00h	/or1k/tags/nog_patch_68