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[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [cpu/] [or1k/] [sprs.c] - Rev 1765

Rev	Log message	Author	Age	Path
1432	Collect most of the cpu state variables in a structure (cpu_state)	nogj	7040d 16h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c
1404	Move the function of ic_clock() to mtspr() and remove it	nogj	7040d 16h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c
1402	Do what dc_clock() did in mtspr() and remove it	nogj	7040d 16h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c
1386	Rework exception handling	nogj	7046d 20h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c
1354	typing fixes	phoenix	7089d 17h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c
1350	Mark a simulated cpu address as such, by introducing the new oraddr_t type	nogj	7090d 14h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c
1308	Gyorgy Jeney: extensive cleanup	phoenix	7295d 09h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c
1302	compile fix (remove const)	phoenix	7313d 07h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c
1203	value stored in ITLB and DTLB match registers was wrong. fixed.	phoenix	7547d 04h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c
1106	Cache invalidate bug fixed again (it was ok before).	simons	7883d 16h	/or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/sprs.c