OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [cpu] - Rev 255

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
173 - profiler added, use e.g.:
make profiler
./sim -profile -fast executable
./profiler -g [-c]

(no special compiling options necessary)
markom 8400d 07h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed
markom 8405d 23h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
153 Writes to SPR_PC are now enabled chris 8448d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
152 Breakpoint exceptions from single step are not printed now. chris 8448d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
144 Modifications necessary for functional gdb interface chris 8450d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
142 Modifications for a functional gdb environment chris 8450d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
141 Added l_trap() chris 8450d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
139 Modifications for functional gdb chris 8450d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
138 - on the fly insn decoding
- removed asm input file support
- removed string from execution
- speedup of loading
markom 8453d 04h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu
137 Added TRAP exception chris 8454d 03h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.