OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_12/] [or1200] - Rev 1037

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
871 Generic flip-flop based memory macro for register file. lampret 8071d 13h /or1k/tags/rel_12/or1200
870 Added defines for enabling generic FF based memory macro for register file. lampret 8071d 13h /or1k/tags/rel_12/or1200
869 Added generic flip-flop based memory macro instantiation. lampret 8071d 13h /or1k/tags/rel_12/or1200
795 Added a directive to ignore signed division variables that are only used in simulation. lampret 8142d 13h /or1k/tags/rel_12/or1200
794 Added again just recently removed full_case directive lampret 8142d 13h /or1k/tags/rel_12/or1200
791 Fixed some ports in instnatiations that were removed from the modules lampret 8142d 13h /or1k/tags/rel_12/or1200
790 Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives lampret 8142d 13h /or1k/tags/rel_12/or1200
788 Some of the warnings fixed. lampret 8142d 14h /or1k/tags/rel_12/or1200
778 Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs. lampret 8143d 10h /or1k/tags/rel_12/or1200
777 Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2 lampret 8143d 10h /or1k/tags/rel_12/or1200

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.