URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_12] - Rev 378

Rev	Log message	Author	Age	Path
358	Fixed virtual silicon single-port rams instantiation.	lampret	8271d 22h	/or1k/tags/rel_12
357	Fixed dbg_is_o assignment width.	lampret	8271d 22h	/or1k/tags/rel_12
356	Break point bug fixed	simons	8272d 01h	/or1k/tags/rel_12
355	uart VAPI model improved; changes to MC and eth.	markom	8272d 08h	/or1k/tags/rel_12
354	Fixed width of du_except.	lampret	8272d 19h	/or1k/tags/rel_12
353	Cashes disabled.	simons	8273d 05h	/or1k/tags/rel_12
352	OR1200_REGISTERED_OUTPUTS can now be enabled.	lampret	8274d 08h	/or1k/tags/rel_12
351	Fixed some l.trap typos.	lampret	8274d 10h	/or1k/tags/rel_12
350	For GDB changed single stepping and disabled trap exception.	lampret	8274d 11h	/or1k/tags/rel_12
349	Some bugs regarding cache simulation fixed.	simons	8276d 00h	/or1k/tags/rel_12