URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_21/] - Rev 1046

Rev	Log message	Author	Age	Path
1026	rtems-20020807 import	ivang	7985d 01h	/or1k/tags/rel_21
1025	PRINTF/printf mess fixed.	simons	7985d 05h	/or1k/tags/rel_21
1024	Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes.	simons	7985d 13h	/or1k/tags/rel_21
1023	Now most of the configuration registers are updatded automatically based on defines in or1200_defines.v.	lampret	7986d 00h	/or1k/tags/rel_21
1022	As per Taylor Su suggestion all case blocks are full case by default and optionally (OR1200_CASE_DEFAULT) can be disabled to increase clock frequncy.	lampret	7986d 02h	/or1k/tags/rel_21
1021	* empty log message *	rherveille	7990d 05h	/or1k/tags/rel_21
1020	Fixed several bugs Working version, tested on Bender hardware	rherveille	7990d 05h	/or1k/tags/rel_21
1019	fixed some bugs detected by Bender hardware	rherveille	7990d 05h	/or1k/tags/rel_21
1018	TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2)	simons	7990d 12h	/or1k/tags/rel_21
1017	TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2)	simons	7990d 12h	/or1k/tags/rel_21