URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_21/] [or1200/] [rtl/] [verilog] - Rev 569

Rev	Log message	Author	Age	Path
356	Break point bug fixed	simons	8300d 02h	/or1k/tags/rel_21/or1200/rtl/verilog
354	Fixed width of du_except.	lampret	8300d 20h	/or1k/tags/rel_21/or1200/rtl/verilog
353	Cashes disabled.	simons	8301d 06h	/or1k/tags/rel_21/or1200/rtl/verilog
352	OR1200_REGISTERED_OUTPUTS can now be enabled.	lampret	8302d 09h	/or1k/tags/rel_21/or1200/rtl/verilog
351	Fixed some l.trap typos.	lampret	8302d 11h	/or1k/tags/rel_21/or1200/rtl/verilog
350	For GDB changed single stepping and disabled trap exception.	lampret	8302d 12h	/or1k/tags/rel_21/or1200/rtl/verilog
338	Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc)	lampret	8307d 11h	/or1k/tags/rel_21/or1200/rtl/verilog
337	Fixed tick timer interrupt reporting by using TTCR[IP] bit.	lampret	8307d 11h	/or1k/tags/rel_21/or1200/rtl/verilog
328	Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports.	lampret	8308d 19h	/or1k/tags/rel_21/or1200/rtl/verilog
316	Fixed exceptions.	lampret	8310d 17h	/or1k/tags/rel_21/or1200/rtl/verilog