URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_21/] [or1200] - Rev 1055

Rev	Log message	Author	Age	Path
958	Disabled ITLB translation when 1) doing access to ITLB SPRs or 2) crossing page. This modification was tested only with parts of IMMU test - remaining test cases needs to be run.	lampret	8005d 22h	/or1k/tags/rel_21/or1200
944	Added OR1200_WB_RETRY. Moved WB registered outsputs / samples inputs into lower section.	lampret	8007d 23h	/or1k/tags/rel_21/or1200
943	Added optional retry counter for wb_rty_i. Added graceful termination for aborted transfers.	lampret	8007d 23h	/or1k/tags/rel_21/or1200
942	Delayed external access at page crossing.	lampret	8007d 23h	/or1k/tags/rel_21/or1200
916	MAC now follows software convention (signed multiply instead of unsigned).	lampret	8020d 03h	/or1k/tags/rel_21/or1200
895	Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized.	lampret	8036d 07h	/or1k/tags/rel_21/or1200
871	Generic flip-flop based memory macro for register file.	lampret	8072d 12h	/or1k/tags/rel_21/or1200
870	Added defines for enabling generic FF based memory macro for register file.	lampret	8072d 13h	/or1k/tags/rel_21/or1200
869	Added generic flip-flop based memory macro instantiation.	lampret	8072d 13h	/or1k/tags/rel_21/or1200
795	Added a directive to ignore signed division variables that are only used in simulation.	lampret	8143d 12h	/or1k/tags/rel_21/or1200