OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_21/] [or1200] - Rev 573

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
359 Added optional sampling of inputs. lampret 8271d 14h /or1k/tags/rel_21/or1200
358 Fixed virtual silicon single-port rams instantiation. lampret 8271d 14h /or1k/tags/rel_21/or1200
357 Fixed dbg_is_o assignment width. lampret 8271d 14h /or1k/tags/rel_21/or1200
356 Break point bug fixed simons 8271d 17h /or1k/tags/rel_21/or1200
354 Fixed width of du_except. lampret 8272d 11h /or1k/tags/rel_21/or1200
353 Cashes disabled. simons 8272d 21h /or1k/tags/rel_21/or1200
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8274d 00h /or1k/tags/rel_21/or1200
351 Fixed some l.trap typos. lampret 8274d 02h /or1k/tags/rel_21/or1200
350 For GDB changed single stepping and disabled trap exception. lampret 8274d 03h /or1k/tags/rel_21/or1200
338 Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc) lampret 8279d 01h /or1k/tags/rel_21/or1200

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.