URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_21/] [or1200] - Rev 994

Rev	Log message	Author	Age	Path
778	Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs.	lampret	8144d 18h	/or1k/tags/rel_21/or1200
777	Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2	lampret	8144d 18h	/or1k/tags/rel_21/or1200
776	Updated defines.	lampret	8144d 18h	/or1k/tags/rel_21/or1200
775	Optimized cache controller FSM.	lampret	8144d 18h	/or1k/tags/rel_21/or1200
774	Removed old files.	lampret	8144d 19h	/or1k/tags/rel_21/or1200
737	Added alternative for critical path in DU.	lampret	8159d 13h	/or1k/tags/rel_21/or1200
736	Changed generation of SPR address. Now it is ORed from base and offset instead of a sum.	lampret	8162d 12h	/or1k/tags/rel_21/or1200
735	Fixed async loop. Changed multiplier type for ASIC.	lampret	8162d 12h	/or1k/tags/rel_21/or1200
668	Lapsus fixed.	simons	8186d 22h	/or1k/tags/rel_21/or1200
663	No longer using async rst as sync reset for the counter.	lampret	8189d 12h	/or1k/tags/rel_21/or1200