URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_25] - Rev 373

Rev	Log message	Author	Age	Path
353	Cashes disabled.	simons	8274d 02h	/or1k/tags/rel_25
352	OR1200_REGISTERED_OUTPUTS can now be enabled.	lampret	8275d 05h	/or1k/tags/rel_25
351	Fixed some l.trap typos.	lampret	8275d 07h	/or1k/tags/rel_25
350	For GDB changed single stepping and disabled trap exception.	lampret	8275d 08h	/or1k/tags/rel_25
349	Some bugs regarding cache simulation fixed.	simons	8276d 20h	/or1k/tags/rel_25
348	Added instructions on how to build configure.	ivang	8278d 04h	/or1k/tags/rel_25
347	Added CRC32 calculation to Ethernet	erez	8279d 02h	/or1k/tags/rel_25
346	Improved Ethernet simulation	erez	8279d 03h	/or1k/tags/rel_25
345	Added check for net/ethernet.h (needed by ethernet simulator)	erez	8279d 03h	/or1k/tags/rel_25
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8279d 05h	/or1k/tags/rel_25