URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0/] [or1ksim/] [peripheral] - Rev 355

Rev	Log message	Author	Age	Path
221	major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup	markom	8327d 17h	/or1k/tags/stable_0_2_0/or1ksim/peripheral
212	Added DMA	erez	8347d 18h	/or1k/tags/stable_0_2_0/or1ksim/peripheral
206	Several modifications to support gdb in a new exception style mode. This new version works with gdb, and does not require the simulator to implement a writeable PC.	chris	8354d 20h	/or1k/tags/stable_0_2_0/or1ksim/peripheral
193	Declared RISCOP.RESET to be volatile so that -O2 optimization would not optimize away the correct behavior by trying to be too clever.	chris	8374d 16h	/or1k/tags/stable_0_2_0/or1ksim/peripheral
187	minor change to clear pending exception	chris	8375d 21h	/or1k/tags/stable_0_2_0/or1ksim/peripheral
186	major change to UART structure	chris	8375d 21h	/or1k/tags/stable_0_2_0/or1ksim/peripheral
185	major change to UART code	chris	8375d 21h	/or1k/tags/stable_0_2_0/or1ksim/peripheral
167	- SPR values corrected - testbenches now work - lot of optimizations, use --disable-debugmod for optimal performance - some tick timer bugs fixed	markom	8404d 13h	/or1k/tags/stable_0_2_0/or1ksim/peripheral
148	Replace single stepping patch that got overwritten	chris	8448d 00h	/or1k/tags/stable_0_2_0/or1ksim/peripheral
145	Modifications necessary for functional gdb debugging interface	chris	8448d 16h	/or1k/tags/stable_0_2_0/or1ksim/peripheral