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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [insight/] - Rev 1765

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Rev Log message Author Age Path
1286 Changed desciption of the l.cust5 insns lampret 7343d 01h /or1k/tags/stable_0_2_0_rc1/insight
1285 Changed desciption of the l.cust5 insns lampret 7343d 01h /or1k/tags/stable_0_2_0_rc1/insight
1256 page size is 8192 on or32 phoenix 7428d 01h /or1k/tags/stable_0_2_0_rc1/insight
1169 Added support for l.addc instruction. csanchez 7656d 02h /or1k/tags/stable_0_2_0_rc1/insight
1152 *** empty log message *** phoenix 7736d 05h /or1k/tags/stable_0_2_0_rc1/insight
1149 *** empty log message *** phoenix 7736d 18h /or1k/tags/stable_0_2_0_rc1/insight
1144 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7739d 00h /or1k/tags/stable_0_2_0_rc1/insight
1142 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7739d 15h /or1k/tags/stable_0_2_0_rc1/insight
1124 Initialize or1k_implementation with reasonable defaults for the number
of implementation registers. This doesn't affect the jtag or sim
targets at all because those values are always overwritten when
or1k_implementation is initialized. However, it is necessary when
connecting to remote gdb stubs through a serial port or socket, since
or1k_implementation is not yet initialized for those targets.
sfurman 7772d 17h /or1k/tags/stable_0_2_0_rc1/insight
1123 Renumber/rename SPRs to match latest architecture doc sfurman 7774d 00h /or1k/tags/stable_0_2_0_rc1/insight

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