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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [sim-config.c] - Rev 856

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632 profiler and mprofiler merged into sim. ivang 8221d 03h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c
631 Real cache access is simulated now. simons 8222d 02h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c
626 store buffer added markom 8222d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c
624 Added logging of writes/read to/from SPR registers. ivang 8223d 08h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c
599 No more low/high priority interrupts (PICPR removed). Added tick timer exception. simons 8232d 01h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c
574 fixed some tests to work markom 8236d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c
572 Some new bugs fixed. simons 8237d 03h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c
568 include command added to cfg script markom 8237d 15h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c
557 some optimizations; fsim running at 2MIPS; pm section added to config; configure bug fixed markom 8241d 14h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c
556 support for SPR_SR_EP added; cpu.sr added to config markom 8241d 16h /or1k/tags/stable_0_2_0_rc1/or1ksim/sim-config.c

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