OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc2/] [or1ksim/] [peripheral/] [eth.c] - Rev 1390

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
841 Controller reset fixed. simons 8125d 02h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/eth.c
836 Fixed bug in file interface. Modified testcase to suid modifications. ivang 8129d 00h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/eth.c
744 Some changes and fixes. simons 8167d 21h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/eth.c
725 Added some more configuration parameters. ivang 8179d 02h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/eth.c
723 Added configuration for socket interface and IRQ level. ivang 8179d 02h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/eth.c
705 Updated changed registers. ivang 8186d 04h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/eth.c
702 Initial coding of ethernet simulator model finished. ivang 8186d 08h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/eth.c
696 Development version of ethernet.c ivang 8193d 04h /or1k/tags/stable_0_2_0_rc2/or1ksim/peripheral/eth.c

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.