URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [tn_m001/] [or1ksim/] [sim.cfg] - Rev 664

Rev	Log message	Author	Age	Path
433	clkcycle parameter added to configuration	markom	8281d 23h	/or1k/tags/tn_m001/or1ksim/sim.cfg
428	cache configuration added	markom	8282d 17h	/or1k/tags/tn_m001/or1ksim/sim.cfg
427	memory_table status output; some bugs fixed in configuration loading	markom	8282d 18h	/or1k/tags/tn_m001/or1ksim/sim.cfg
425	immu and dmmu configurations added	markom	8282d 19h	/or1k/tags/tn_m001/or1ksim/sim.cfg
424	memory configuration file joined into .cfg file; *mem.cfg are obsolete; read-only and write-only memory is supported; memory logging is not yet supported; update of testbench - only cache test fails, since it writes to RO memory	markom	8282d 21h	/or1k/tags/tn_m001/or1ksim/sim.cfg
394	dependency joined with dependstats; history moved to sim section	markom	8296d 00h	/or1k/tags/tn_m001/or1ksim/sim.cfg
388	Added comments for cpu section.	lampret	8296d 10h	/or1k/tags/tn_m001/or1ksim/sim.cfg
384	modified simmem.cfg structure! ADD > BEFORE EACH LINE!	markom	8296d 19h	/or1k/tags/tn_m001/or1ksim/sim.cfg
383	modified simmem.cfg structure! ADD	markom	8296d 19h	/or1k/tags/tn_m001/or1ksim/sim.cfg
355	uart VAPI model improved; changes to MC and eth.	markom	8303d 20h	/or1k/tags/tn_m001/or1ksim/sim.cfg