URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [trunk/] [or1ksim/] [cpu/] [or32] - Rev 1452

Rev	Log message	Author	Age	Path
1341	Mark wich operand is the destination operand in the architechture definition	nogj	7108d 19h	/or1k/trunk/or1ksim/cpu/or32
1338	l.ff1 instruction added	andreje	7124d 16h	/or1k/trunk/or1ksim/cpu/or32
1321	some tests rely on exit(0) as a last std output text to pass	phoenix	7210d 09h	/or1k/trunk/or1ksim/cpu/or32
1319	cpu/sim memory accesses separation, tick, exception, nr. of operands, cycles count,... corrections.	phoenix	7212d 09h	/or1k/trunk/or1ksim/cpu/or32
1309	removed includes	phoenix	7297d 12h	/or1k/trunk/or1ksim/cpu/or32
1308	Gyorgy Jeney: extensive cleanup	phoenix	7300d 09h	/or1k/trunk/or1ksim/cpu/or32
1303	compile fix regarding lf.itof.s, lf.itof.d	phoenix	7317d 21h	/or1k/trunk/or1ksim/cpu/or32
1295	Updated instruction set descriptions. Changed FP instructions encoding.	lampret	7322d 09h	/or1k/trunk/or1ksim/cpu/or32
1290	added more operands	phoenix	7361d 09h	/or1k/trunk/or1ksim/cpu/or32
1286	Changed desciption of the l.cust5 insns	lampret	7371d 12h	/or1k/trunk/or1ksim/cpu/or32