URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk] - Rev 371

Rev	Log message	Author	Age	Path
351	Fixed some l.trap typos.	lampret	8304d 08h	/or1k/trunk
350	For GDB changed single stepping and disabled trap exception.	lampret	8304d 10h	/or1k/trunk
349	Some bugs regarding cache simulation fixed.	simons	8305d 22h	/or1k/trunk
348	Added instructions on how to build configure.	ivang	8307d 06h	/or1k/trunk
347	Added CRC32 calculation to Ethernet	erez	8308d 03h	/or1k/trunk
346	Improved Ethernet simulation	erez	8308d 05h	/or1k/trunk
345	Added check for net/ethernet.h (needed by ethernet simulator)	erez	8308d 05h	/or1k/trunk
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8308d 07h	/or1k/trunk
343	Small touches to test programs	erez	8308d 09h	/or1k/trunk
342	added exception vectors to support and modified section names	markom	8309d 06h	/or1k/trunk